IBS and POSTECH Build Modular 2D Transistors by Swapping Atoms, Paper in Science
A Science paper from Korea’s Institute for Basic Science and POSTECH shows layer-by-layer chalcogen substitution that turns one 2D film into semiconductor, insulator and electrode layers. Reported switch performance approaches the room-temperature theoretical limit.
By 1EyeAI Desk ·
Researchers led by Moon-Ho Jo at the IBS Center for Van der Waals Quantum Solids and POSTECH report in Science (Vol. 394, Issue 6821, pp. 340–346; DOI 10.1126/science.aei2693; print dated Oct. 15, 2026) a method of layer-by-layer vapor-phase chalcogen substitution starting from multilayer tungsten diselenide (WSe2). By swapping selenium for oxygen, sulfur or tellurium with about 0.7 nm layer precision, they locally form insulating WOx, n-type WS2 and semimetallic WTe2 alongside p-type WSe2 channels—building modular van der Waals MOSFETs without conventional multilayer transfer stacks.
South Korea’s Ministry of Science and ICT and IBS described the result on Oct. 16. As reported by Asia Business Daily citing that announcement: contact barrier about 35.5 meV with the semimetal contact (roughly one-third of a direct metal contact in their comparison); subthreshold swing 61.3 mV/decade near the ~60 mV room-temperature Boltzmann limit; on/off ratio above 10 million to one; equivalent oxide thickness 0.3–0.4 nm; and a vertically stacked CMOS inverter running at 1 V. Treat those device figures as reported via the ministry/IBS brief unless independently re-measured from the paper’s full text.
The Science editors’ summary calls the devices’ subnanometer equivalent oxide thickness “exceptional.” The team notes a remaining gap for industry: uniform, reproducible substitution across large wafer-scale areas. Follow-up work targets more 2D materials and 3D stacked circuits. Co-first authors include Seok Young Min and Hyunje Cho; a related Korean patent application is disclosed in the paper’s competing-interests statement.
What this means for you: No phone or GPU changes today. For chip and materials watchers, it is a peer-reviewed path toward denser 2D logic—still short of proven fab-scale manufacturing.